Voltage source circuit based on CMOS floating-gate memory

Jesús De La Cruz Alejo; Victor Ponce; Felipe Gómez Castañeda; José A.Moreno Cadenas

doi:10.1109/ICEEE.2007.4345050

Voltage source circuit based on CMOS floating-gate memory

Jesús De La Cruz Alejo, Victor Ponce, Felipe Gómez Castañeda, José A.Moreno Cadenas

Centro de Investigación en Computación (CIC)

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

This paper present a new circuit designed to support high accuracy reference voltages over a nearly full range of the power supply. To achieve this, the circuit is designed to be efficient utilizing a CMOS floating gate memory fabricated in 1.2 μm CMOS process. The memory stores voltages as charge on the floating gate of a pMOS transistor. The output voltages of the circuit are easily programming by simply modifying the value of the floating gate through the tunnelling and injection hot electrons mechanisms. Also, the circuit can drive a resistive load with the advantage of reduced both silicon area and dissipated power on chip.

Original language	English
Title of host publication	2007 4th International Conference on Electrical and Electronics Engineering, ICEEE 2007
Pages	400-403
Number of pages	4
DOIs	https://doi.org/10.1109/ICEEE.2007.4345050
State	Published - 2007
Event	2007 4th International Conference on Electrical and Electronics Engineering, ICEEE 2007 - Mexico City, Mexico Duration: 5 Sep 2007 → 7 Sep 2007

Publication series

Name	2007 4th International Conference on Electrical and Electronics Engineering, ICEEE 2007

Conference

Conference	2007 4th International Conference on Electrical and Electronics Engineering, ICEEE 2007
Country/Territory	Mexico
City	Mexico City
Period	5/09/07 → 7/09/07

Keywords

CMOS
Floating gate
Injection
Tunneling

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10.1109/ICEEE.2007.4345050

Cite this

De La Cruz Alejo, J., Ponce, V., Castañeda, F. G., & Cadenas, J. A. M. (2007). Voltage source circuit based on CMOS floating-gate memory. In 2007 4th International Conference on Electrical and Electronics Engineering, ICEEE 2007 (pp. 400-403). Article 4345050 (2007 4th International Conference on Electrical and Electronics Engineering, ICEEE 2007). https://doi.org/10.1109/ICEEE.2007.4345050

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title = "Voltage source circuit based on CMOS floating-gate memory",

abstract = "This paper present a new circuit designed to support high accuracy reference voltages over a nearly full range of the power supply. To achieve this, the circuit is designed to be efficient utilizing a CMOS floating gate memory fabricated in 1.2 μm CMOS process. The memory stores voltages as charge on the floating gate of a pMOS transistor. The output voltages of the circuit are easily programming by simply modifying the value of the floating gate through the tunnelling and injection hot electrons mechanisms. Also, the circuit can drive a resistive load with the advantage of reduced both silicon area and dissipated power on chip.",

keywords = "CMOS, Floating gate, Injection, Tunneling",

author = "{De La Cruz Alejo}, Jes{\'u}s and Victor Ponce and Casta{\~n}eda, {Felipe G{\'o}mez} and Cadenas, {Jos{\'e} A.Moreno}",

year = "2007",

doi = "10.1109/ICEEE.2007.4345050",

language = "Ingl{\'e}s",

isbn = "1424411661",

series = "2007 4th International Conference on Electrical and Electronics Engineering, ICEEE 2007",

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note = "2007 4th International Conference on Electrical and Electronics Engineering, ICEEE 2007 ; Conference date: 05-09-2007 Through 07-09-2007",

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De La Cruz Alejo, J, Ponce, V, Castañeda, FG & Cadenas, JAM 2007, Voltage source circuit based on CMOS floating-gate memory. in 2007 4th International Conference on Electrical and Electronics Engineering, ICEEE 2007., 4345050, 2007 4th International Conference on Electrical and Electronics Engineering, ICEEE 2007, pp. 400-403, 2007 4th International Conference on Electrical and Electronics Engineering, ICEEE 2007, Mexico City, Mexico, 5/09/07. https://doi.org/10.1109/ICEEE.2007.4345050

Voltage source circuit based on CMOS floating-gate memory. / De La Cruz Alejo, Jesús; Ponce, Victor; Castañeda, Felipe Gómez et al.
2007 4th International Conference on Electrical and Electronics Engineering, ICEEE 2007. 2007. p. 400-403 4345050 (2007 4th International Conference on Electrical and Electronics Engineering, ICEEE 2007).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Ponce, Victor

AU - Castañeda, Felipe Gómez

AU - Cadenas, José A.Moreno

PY - 2007

Y1 - 2007

N2 - This paper present a new circuit designed to support high accuracy reference voltages over a nearly full range of the power supply. To achieve this, the circuit is designed to be efficient utilizing a CMOS floating gate memory fabricated in 1.2 μm CMOS process. The memory stores voltages as charge on the floating gate of a pMOS transistor. The output voltages of the circuit are easily programming by simply modifying the value of the floating gate through the tunnelling and injection hot electrons mechanisms. Also, the circuit can drive a resistive load with the advantage of reduced both silicon area and dissipated power on chip.

AB - This paper present a new circuit designed to support high accuracy reference voltages over a nearly full range of the power supply. To achieve this, the circuit is designed to be efficient utilizing a CMOS floating gate memory fabricated in 1.2 μm CMOS process. The memory stores voltages as charge on the floating gate of a pMOS transistor. The output voltages of the circuit are easily programming by simply modifying the value of the floating gate through the tunnelling and injection hot electrons mechanisms. Also, the circuit can drive a resistive load with the advantage of reduced both silicon area and dissipated power on chip.

KW - CMOS

KW - Floating gate

KW - Injection

KW - Tunneling

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DO - 10.1109/ICEEE.2007.4345050

M3 - Contribución a la conferencia

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BT - 2007 4th International Conference on Electrical and Electronics Engineering, ICEEE 2007

T2 - 2007 4th International Conference on Electrical and Electronics Engineering, ICEEE 2007

Y2 - 5 September 2007 through 7 September 2007

ER -

Voltage source circuit based on CMOS floating-gate memory

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Keywords

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