TY - GEN
T1 - FPGA-based modeling and design methodology of a digital pre-distortion system for power amplifier linearization
AU - Juarez-Cazares, S. A.
AU - Melendez-Cano, A.
AU - Cardenas-Valdez, J. R.
AU - Galaviz-Aguilar, J. A.
AU - Vazquez-Lopez, C. E.
AU - Roblin, P.
AU - Nunez-Perez, J. C.
N1 - Publisher Copyright:
© 2016 IEEE.
PY - 2016/12/22
Y1 - 2016/12/22
N2 - This paper presents the design methodology of a complete digital pre-distortion system that enables the power amplifier linearization. This system employs the memory polynomial model for its realization. The performance of the linearization is validated by using an LTE carrier signal in the band of 10 MHz. This integrated solution is capable of linearizing any real power amplifier from measurements of AM/AM and AM/PM conversion curves. Furthermore, this development test bed is able to predict the behavior and facilitates the design analysis of a pre-distorter. The experimental results are implemented employing a DSP-FPGA by using DSP Builder tool to obtain the VHDL hardware description. The proposed model shows a spurious-free dynamic range of 50 dBm and an adjacent channel power ratio reduction of 25 dBc for the NXP 10W power amplifier.
AB - This paper presents the design methodology of a complete digital pre-distortion system that enables the power amplifier linearization. This system employs the memory polynomial model for its realization. The performance of the linearization is validated by using an LTE carrier signal in the band of 10 MHz. This integrated solution is capable of linearizing any real power amplifier from measurements of AM/AM and AM/PM conversion curves. Furthermore, this development test bed is able to predict the behavior and facilitates the design analysis of a pre-distorter. The experimental results are implemented employing a DSP-FPGA by using DSP Builder tool to obtain the VHDL hardware description. The proposed model shows a spurious-free dynamic range of 50 dBm and an adjacent channel power ratio reduction of 25 dBc for the NXP 10W power amplifier.
KW - AM/AM
KW - AM/PM
KW - Digital predistorsion
KW - FPGA
KW - Power amplifier
UR - http://www.scopus.com/inward/record.url?scp=85011048591&partnerID=8YFLogxK
U2 - 10.1109/ICMEAE.2016.029
DO - 10.1109/ICMEAE.2016.029
M3 - Contribución a la conferencia
AN - SCOPUS:85011048591
T3 - Proceedings - 2016 International Conference on Mechatronics, Electronics, and Automotive Engineering, ICMEAE 2016
SP - 113
EP - 118
BT - Proceedings - 2016 International Conference on Mechatronics, Electronics, and Automotive Engineering, ICMEAE 2016
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2016 International Conference on Mechatronics, Electronics, and Automotive Engineering, ICMEAE 2016
Y2 - 22 November 2016 through 25 November 2016
ER -