Turbo codification techniques for error control in a communication channel

An implementation of the turbo coding technique for data error detection and correction in data transmission is presented. The turbo coding technique is known to be efficient in data transmission adding redundant parity that provides a high error correction capacity decreasing the number of erroneous bits for low signal to noise ratios increasing the number of iterations. The turbo encoder and turbo decoder were implemented in a FPGA development system. The design is oriented to reach a transmission speed near to the theoretical Shannon's capacity of the communication channel and minimum possible energy consumption using only the FPGA resources without external memories.