Resumen
This paper propose a technique to reduce the delta power and ground bounce and the settling time of these noise signals in buffer structure. Used technique, is compared with no compensation circuit and a decoupling capacitor circuit well known technique. The results were obtained using SPICE simulations with a realistic 0.25um BSIM device model technology and a 2.5V power supply.
Idioma original | Inglés |
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Páginas (desde-hasta) | 478-483 |
Número de páginas | 6 |
Publicación | WSEAS Transactions on Electronics |
Volumen | 3 |
N.º | 9 |
Estado | Publicada - sep. 2006 |