TY - JOUR
T1 - Hardware implementation of the elitist compact Genetic Algorithm using Cellular Automata pseudo-random number generator
AU - Moreno-Armendáriz, Marco A.
AU - Cruz-Cortés, Nareli
AU - Duchanoy, Carlos A.
AU - León-Javier, Alejandro
AU - Quintero, Rolando
PY - 2013/5
Y1 - 2013/5
N2 - In this paper the design and implementation of two versions of the compact Genetic Algorithm (cGA), with and without mutation and elitism, and a Cellular Automata-based pseudo-random number generator on a Field Programmable Gate Arrays (FPGAs) are accomplished. The design is made using a Hardware Description Language, called VHDL. Accordingly, the obtained results show that it is viable to have this searching algorithm in hardware to be used in real time applications.
AB - In this paper the design and implementation of two versions of the compact Genetic Algorithm (cGA), with and without mutation and elitism, and a Cellular Automata-based pseudo-random number generator on a Field Programmable Gate Arrays (FPGAs) are accomplished. The design is made using a Hardware Description Language, called VHDL. Accordingly, the obtained results show that it is viable to have this searching algorithm in hardware to be used in real time applications.
UR - http://www.scopus.com/inward/record.url?scp=84878864592&partnerID=8YFLogxK
U2 - 10.1016/j.compeleceng.2013.03.016
DO - 10.1016/j.compeleceng.2013.03.016
M3 - Artículo
SN - 0045-7906
VL - 39
SP - 1367
EP - 1379
JO - Computers and Electrical Engineering
JF - Computers and Electrical Engineering
IS - 4
ER -