TY - JOUR
T1 - FPGA-based system for effective IQ imbalance mitigation of RF power amplifiers
AU - Nuñez Perez, Jose Cruz
AU - Juarez Cazares, Sergio Alberto
AU - Galaviz Aguilar, Jose Alejandro
AU - Sandoval Ibarra, Yuma
AU - Perez Pinal, Francisco Javier
AU - Tlelo Cuautle, Esteban
N1 - Publisher Copyright:
© 2020 John Wiley & Sons, Ltd.
PY - 2020/4/1
Y1 - 2020/4/1
N2 - To provide an adequate signal integrity to a power amplifier (PA), we propose a digital system for the degradation at the transmitter path, and it is implemented on a field-programmable gate array (FPGA) board. The proposed system offers the following features: A (Formula presented.) -ary quadrature amplitude modulation (QAM) digital signal generation and in-phase/quadrature (IQ) imbalance mitigation, and by default, it performs as a predistortion model extraction from PA-measured data. The simulations and tests provided are performed to effectively verify the PA linearity by using 256-QAM signals. The nonlinearities are predicted as a reliable solution for linearizing the PA from measurements of AM/AM and AM/PM conversion curves. The performance is evaluated in terms of linearity, computation complexity, and FPGA hardware synthesis according to a dependability compliance of digital signal processing. Finally, the model is validated with input/output data observations to linearize the model with a fitting normalized mean squared error (NMSE) of around (Formula presented.) dB, a spurious free dynamic range of 40 dBm, and an adjacent channel power ratio reduction by (Formula presented.) dBm, for a class-AB broadband radio frequency PA GaN HEMT of 10 W working at 2.34 GHz.
AB - To provide an adequate signal integrity to a power amplifier (PA), we propose a digital system for the degradation at the transmitter path, and it is implemented on a field-programmable gate array (FPGA) board. The proposed system offers the following features: A (Formula presented.) -ary quadrature amplitude modulation (QAM) digital signal generation and in-phase/quadrature (IQ) imbalance mitigation, and by default, it performs as a predistortion model extraction from PA-measured data. The simulations and tests provided are performed to effectively verify the PA linearity by using 256-QAM signals. The nonlinearities are predicted as a reliable solution for linearizing the PA from measurements of AM/AM and AM/PM conversion curves. The performance is evaluated in terms of linearity, computation complexity, and FPGA hardware synthesis according to a dependability compliance of digital signal processing. Finally, the model is validated with input/output data observations to linearize the model with a fitting normalized mean squared error (NMSE) of around (Formula presented.) dB, a spurious free dynamic range of 40 dBm, and an adjacent channel power ratio reduction by (Formula presented.) dBm, for a class-AB broadband radio frequency PA GaN HEMT of 10 W working at 2.34 GHz.
KW - FPGA
KW - IQ imbalance estimation
KW - RF circuits
KW - digital predistortion
KW - power amplifiers
KW - quadrature modulation
UR - http://www.scopus.com/inward/record.url?scp=85079715372&partnerID=8YFLogxK
U2 - 10.1002/cta.2746
DO - 10.1002/cta.2746
M3 - Artículo
AN - SCOPUS:85079715372
SN - 0098-9886
VL - 48
SP - 512
EP - 523
JO - International Journal of Circuit Theory and Applications
JF - International Journal of Circuit Theory and Applications
IS - 4
ER -