TY - JOUR
T1 - CMOS analog neurofuzzy prototype based on ANFIS
AU - Arellano-Cardenas, O.
AU - Molina-Lozano, H.
AU - Moreno-Cadenas, J.
AU - Gomez-Castaneda, F.
AU - Flores-Nava, L.
PY - 2000
Y1 - 2000
N2 - The architecture called ANFIS (Adaptive Neuro-Fuzzy Inference System) proposed by J. R. Jang is divided in five layers. Layers 1 and 2 in ANFIS were build by using a double-differential amplifier and a winner take all circuit; to implement layers 3, 4 and 5, CMOS translinear blocks are used. The complete ANFIS architecture is implemented on a circuit board, using two CMOS circuits (N-well and 2 μm of minimum dimensions). The total system has two inputs with three membership functions each one, which generate a fuzzy space with nine subspaces and one single output. The system is used for classification of electrical signals.
AB - The architecture called ANFIS (Adaptive Neuro-Fuzzy Inference System) proposed by J. R. Jang is divided in five layers. Layers 1 and 2 in ANFIS were build by using a double-differential amplifier and a winner take all circuit; to implement layers 3, 4 and 5, CMOS translinear blocks are used. The complete ANFIS architecture is implemented on a circuit board, using two CMOS circuits (N-well and 2 μm of minimum dimensions). The total system has two inputs with three membership functions each one, which generate a fuzzy space with nine subspaces and one single output. The system is used for classification of electrical signals.
UR - http://www.scopus.com/inward/record.url?scp=0033698639&partnerID=8YFLogxK
U2 - 10.1109/ISCAS.2000.856163
DO - 10.1109/ISCAS.2000.856163
M3 - Artículo
SN - 0271-4310
VL - 3
SP - III-726-III-729
JO - Proceedings - IEEE International Symposium on Circuits and Systems
JF - Proceedings - IEEE International Symposium on Circuits and Systems
ER -