Multilayer perceptron network with integrated training algorithm in FPGA

A. N. Pérez-García, G. M. Tornez-Xavier, L. M. Flores-Nava, F. Gómez-Castañeda, J. A. Moreno-Cadenas

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations

Abstract

In this manuscript we present the implementation of an artificial neural network type Multilayer Perceptron (ANN-MP or NNMP) in Field-Programmable Gate Arrays (FPGA), including Back-Propagation training method based on descendent gradient. This network has 2 reconfigurable hidden layers, adjustable parameters (epochs and ratio learning) and batch learning. The proposed architecture aims to reduce the number of logical elements to be used, so serial processing is utilized. In order to test the performance of the trained network, a nonlinear function was approximated with satisfactory results.

Original languageEnglish
Title of host publication2014 11th International Conference on Electrical Engineering, Computing Science and Automatic Control, CCE 2014
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781479962310
DOIs
StatePublished - 2014
Externally publishedYes
Event2014 11th International Conference on Electrical Engineering, Computing Science and Automatic Control, CCE 2014 - Ciudad del Carmen, Mexico
Duration: 29 Sep 20143 Oct 2014

Publication series

Name2014 11th International Conference on Electrical Engineering, Computing Science and Automatic Control, CCE 2014

Conference

Conference2014 11th International Conference on Electrical Engineering, Computing Science and Automatic Control, CCE 2014
Country/TerritoryMexico
CityCiudad del Carmen
Period29/09/143/10/14

Keywords

  • Artificial neural network
  • Back propagation
  • Descendent gradient
  • FPGA

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