Mismatch compensation in current mirrors with FGMOS transistor

Jesús De La Cruz Alejo, L. Noe Oliva Moreno

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

5 Scopus citations

Abstract

This paper presents a technique to solve mismatch compensation problems in current mirrors using the floating gate MOS transistor. To reduce mismatches, the tunneling and injection processes are applied in a 1.2μm CMOS process. It takes into account the long-term voltage storage as charge on the floating gate of a transistor pMOS. Experimental results justifying these processes are also including. The output current of the current mirror present successful results according to theorical analysis and achieving the mismatch compensation.

Original languageEnglish
Title of host publicationProgram and Abstract Book - 2010 7th International Conference on Electrical Engineering, Computing Science and Automatic Control, CCE 2010
Pages599-603
Number of pages5
DOIs
StatePublished - 2010
Event2010 7th International Conference on Electrical Engineering, Computing Science and Automatic Control, CCE 2010 - Tuxtla Gutierrez, Mexico
Duration: 8 Sep 201010 Sep 2010

Publication series

NameProgram and Abstract Book - 2010 7th International Conference on Electrical Engineering, Computing Science and Automatic Control, CCE 2010

Conference

Conference2010 7th International Conference on Electrical Engineering, Computing Science and Automatic Control, CCE 2010
Country/TerritoryMexico
CityTuxtla Gutierrez
Period8/09/1010/09/10

Keywords

  • Current
  • Floating-gate
  • Injection
  • Mirror
  • Mismatch
  • Tunneling

Fingerprint

Dive into the research topics of 'Mismatch compensation in current mirrors with FGMOS transistor'. Together they form a unique fingerprint.

Cite this