@inproceedings{c3fdff66f98e413693050417662bbe86,
title = "Memristive Optimizer for the Assignment Task",
abstract = "This work shows an analog CMOS matrix compatible with memristors, where they work as dynamic resistors. They are also programmed to initial state values according to one assignment optimization task, taken here as an application vehicle. The whole matrix accomplishes a parallel competitive computation, where a winner-take-all mechanism is inherent by architecture. The expected complexity due to area in silicon of this memristive circuit and its connectivity are moderate, as is evident from observing its electrical diagram. Also, its performance is acceptable as proven via SPICE simulations, using 0.5-micron CMOS process. Lower processing time might be possible with latest CMOS technologies.",
keywords = "CMOS, Competitive system, Memristor, Optimizer, TEAM, Verilog-A",
author = "Tornez-Xavier, {G. M.} and Flores-Nava, {L. M.} and F. Gomez-Castaneda and Moreno-Cadenas, {J. A.}",
note = "Publisher Copyright: {\textcopyright} 2018 IEEE.; 15th International Conference on Electrical Engineering, Computing Science and Automatic Control, CCE 2018 ; Conference date: 05-09-2018 Through 07-09-2018",
year = "2018",
month = nov,
day = "13",
doi = "10.1109/ICEEE.2018.8533979",
language = "Ingl{\'e}s",
series = "2018 15th International Conference on Electrical Engineering, Computing Science and Automatic Control, CCE 2018",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2018 15th International Conference on Electrical Engineering, Computing Science and Automatic Control, CCE 2018",
address = "Estados Unidos",
}