TY - JOUR
T1 - Implementation of RSA Signatures on GPU and CPU Architectures
AU - Ochoa-Jimenez, Eduardo
AU - Rivera-Zamarripa, Luis
AU - Cruz-Cortes, Nareli
AU - Rodriguez-Henriquez, Francisco
N1 - Publisher Copyright:
© 2013 IEEE.
PY - 2020
Y1 - 2020
N2 - This paper reports a constant-time CPU and GPU software implementation of the RSA exponentiation by using algorithms that offer a first-line defense against timing and cache attacks. In the case of GPU platforms the modular arithmetic layer was implemented using the Residue Number System (RNS) representation. We also present a CPU implementation of an RNS-based arithmetic that takes advantage of the parallelism provided by the Advanced Vector Extensions 2 (AVX2) instructions. Moreover, we carefully analyze the performance of two popular RNS modular reduction algorithms when implemented on many- and multi-core platforms. In the case of CPU platforms we also report that a combination of the schoolbook and Karatsuba algorithms for integer multiplication along with Montgomery reduction, yields our fastest modular multiplication procedure. In comparison with previous literature, our software library achieves faster timings for the computation of the RSA exponentiation using 1024-, 2048- and 3072-bit private keys.
AB - This paper reports a constant-time CPU and GPU software implementation of the RSA exponentiation by using algorithms that offer a first-line defense against timing and cache attacks. In the case of GPU platforms the modular arithmetic layer was implemented using the Residue Number System (RNS) representation. We also present a CPU implementation of an RNS-based arithmetic that takes advantage of the parallelism provided by the Advanced Vector Extensions 2 (AVX2) instructions. Moreover, we carefully analyze the performance of two popular RNS modular reduction algorithms when implemented on many- and multi-core platforms. In the case of CPU platforms we also report that a combination of the schoolbook and Karatsuba algorithms for integer multiplication along with Montgomery reduction, yields our fastest modular multiplication procedure. In comparison with previous literature, our software library achieves faster timings for the computation of the RSA exponentiation using 1024-, 2048- and 3072-bit private keys.
KW - AVX2 instructions
KW - CPU
KW - GPU
KW - Public key cryptography
KW - RNS arithmetic
KW - RSA
UR - http://www.scopus.com/inward/record.url?scp=85078481917&partnerID=8YFLogxK
U2 - 10.1109/ACCESS.2019.2963826
DO - 10.1109/ACCESS.2019.2963826
M3 - Artículo
AN - SCOPUS:85078481917
SN - 2169-3536
VL - 8
SP - 9928
EP - 9941
JO - IEEE Access
JF - IEEE Access
M1 - 8949525
ER -