Implementation of RSA Signatures on GPU and CPU Architectures

Eduardo Ochoa-Jimenez, Luis Rivera-Zamarripa, Nareli Cruz-Cortes, Francisco Rodriguez-Henriquez

Resultado de la investigación: Contribución a una revistaArtículorevisión exhaustiva

8 Citas (Scopus)

Resumen

This paper reports a constant-time CPU and GPU software implementation of the RSA exponentiation by using algorithms that offer a first-line defense against timing and cache attacks. In the case of GPU platforms the modular arithmetic layer was implemented using the Residue Number System (RNS) representation. We also present a CPU implementation of an RNS-based arithmetic that takes advantage of the parallelism provided by the Advanced Vector Extensions 2 (AVX2) instructions. Moreover, we carefully analyze the performance of two popular RNS modular reduction algorithms when implemented on many- and multi-core platforms. In the case of CPU platforms we also report that a combination of the schoolbook and Karatsuba algorithms for integer multiplication along with Montgomery reduction, yields our fastest modular multiplication procedure. In comparison with previous literature, our software library achieves faster timings for the computation of the RSA exponentiation using 1024-, 2048- and 3072-bit private keys.

Idioma originalInglés
Número de artículo8949525
Páginas (desde-hasta)9928-9941
Número de páginas14
PublicaciónIEEE Access
Volumen8
DOI
EstadoPublicada - 1 ene 2020

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