@inproceedings{d8bd5beb5d5b405daca65b6efe051c83,
title = "High performance cache",
abstract = "This paper presents a novel data cache memory called High Performance Cache (HPC) which is focused on improves the behavior of the memory system of superscalar processors. Which looking to keep a balance between the average time of access and the miss rate and naturally reduces power consumption. It is a cache of so-called semi-associative already operates as a hybrid between direct access and two-way associative. A traditional direct access cache memory is conceptually partitioned into a multiple banks, and the blocks in each bank are examined sequentially and predicted based on the stride, but with the support of an accountant saturated to increase the accuracy of prediction. This cache reduces the power consumption in proportion to the number of accesses made as two-way associative cache, and reduces the average time of access in proportion to the number of access made as a direct cache mapping.",
keywords = "Accountant saturated, Average time of access, Memory cache, Power consumption, Prediction",
author = "{Camacho N.}, Oscar and {A. Villa V.}, Luis and {Espinosa S.}, Osvaldo",
year = "2008",
language = "Ingl{\'e}s",
isbn = "1601320566",
series = "Proceedings of the 2008 International Conference on Computer Design, CDES 2008",
pages = "181--187",
booktitle = "Proceedings of the 2008 International Conference on Computer Design, CDES 2008",
note = "2008 International Conference on Computer Design, CDES 2008 ; Conference date: 14-07-2008 Through 17-07-2008",
}