TY - JOUR
T1 - Design and implementation of differential evolution algorithm on FPGA for double-precision floating-point representation
AU - Cortés-Antonio, Prometeo
AU - Rangel-González, Josue
AU - Villa-Vargas, Luis A.
AU - Ramírez-Salinas, Marco Antonio
AU - Molina-Lozano, Herón
AU - Batyrshin, Ildar
PY - 2014
Y1 - 2014
N2 - The paper presents the results of implementation of differential evolution algorithm on FPGA using floating point representation with double precision useful in real numeric problems. Verilog Hardware Description Language (HDL) was used for Altera hardware design. Schematics of the modules of differential evolution algorithm are presented. The performance of the design is evaluated through six different functions problems implemented in hardware.
AB - The paper presents the results of implementation of differential evolution algorithm on FPGA using floating point representation with double precision useful in real numeric problems. Verilog Hardware Description Language (HDL) was used for Altera hardware design. Schematics of the modules of differential evolution algorithm are presented. The performance of the design is evaluated through six different functions problems implemented in hardware.
KW - Differential evolution algorithm
KW - FPGA
KW - Floating point
UR - http://www.scopus.com/inward/record.url?scp=84899670288&partnerID=8YFLogxK
M3 - Artículo
SN - 1785-8860
VL - 11
SP - 139
EP - 153
JO - Acta Polytechnica Hungarica
JF - Acta Polytechnica Hungarica
IS - 4
ER -