@inproceedings{4d8c0e442d4d46d39c299ec155164a4a,
title = "Stride-based speculative cache access",
abstract = "Serialized cache access has been a strategy proposed in others' works to reduce the latency penalty introduced in a two-way set-associative cache. In this paper we present a novel mechanism, which provides a better or the same miss rate as a two-way set-associative cache, and with similar access time as a direct mapped cache. We use an address prediction strategy to select the correct cache set-entry in a virtually partitioned direct mapped cache.",
keywords = "Cache, Memory, Prediction, Speculative",
author = "Luis Villa and Oscar Camacho and Alejandro Villar and Cesar Osuna and Gustavo Santana and Manuel Romero",
year = "2003",
language = "Ingl{\'e}s",
isbn = "0889863490",
series = "Proceedings of the IASTED International Conference on Computer Science and Technology",
pages = "164--169",
editor = "S. Sahni",
booktitle = "Proceedings of the IASTED International Conference on Computer Science and Technology",
note = "Proceedings of the IASTED International Conference on Computer Science and Technology ; Conference date: 19-05-2003 Through 21-05-2003",
}