Methodology to test and validate a VHDL inference engine through the Xilinx system generator

There exists an increasing interest in the field of digital intelligent systems, being one of the current research target the computational efficiency. This work presents the implementation of a fuzzy inference system faced to achieve high performance computations since the highly flexibility that a specific tailored FPGA implementation can offer to parallelize processes. A methodology to simulate and validate the inference engine developed in VHDL is given. Improvements over an exciting inference engine are proposed. The resulting code can be implemented in specific application hardware.