TY - JOUR
T1 - Advantages of the graded-channel SOI FD MOSFET for application as a quasi-linear resistor
AU - Cerdeira, Antonio
AU - Alemán, Miguel A.
AU - Pavanello, Marcelo Antonio
AU - Martino, João Antonio
AU - Vancaillie, Laurent
AU - Flandre, Denis
N1 - Funding Information:
Manuscript received April 13, 2004; revised January 28, 2005. This work was supported by the CONACYT under Project 39708. The review of this paper was arranged by Editor M.-C. Chang. A. Cerdeira and M. A. Alemán are with the Sección de Electrónica del Estado Sólido (SEES), CINVESTAV, 07300 DF, México (e-mail:cerdeira@mail.cin-vestav.mx). M. A. Pavanello and J. A. Martino are with the Centro Universitário da FEI, São Bernardo do Campo 09850-901, Brazil, and also with the Laboratório de Sistemas Integráveis, Universidade de Sao Paulo, Sao Paulo 05508-900, Brazil. L. Vancaillie and D. Flandre are with the Laboratoire de Microélectronique, Louvain-la-Neuve B-1348, Belgium (e-mail: flandre@dice.ucl.ac.be). Digital Object Identifier 10.1109/TED.2005.846327
PY - 2005/5
Y1 - 2005/5
N2 - In this paper, we analyze the previously unexpected advantages of asymmetric channel engineering on the MOS resistance behavior in quasi-linear operation, such as used in integrated continuous-time tunable filters. The study of the two major figures of merit in such applications as on-resistance and nonlinear harmonic distortion, is supported by both measurements and simulations of conventional and graded-channel (GC) fully depleted silicon-on-insultor (SOI) MOSFETs. The quasi-linear current-voltage characteristics of GC transistors show a decrease of the on-resistance as the length of the low doped region in the channel is increased, as well as an improvement in the third-order harmonic distortion (HD3), when compared with conventional transistors. A method for full comparison between conventional and GC SOI MOSFETs is presented, considering HD3 evolution with on-resistance tuning under low voltage of operation. Results demonstrate the significant advantages provided by the asymmetrical long channel transistors.
AB - In this paper, we analyze the previously unexpected advantages of asymmetric channel engineering on the MOS resistance behavior in quasi-linear operation, such as used in integrated continuous-time tunable filters. The study of the two major figures of merit in such applications as on-resistance and nonlinear harmonic distortion, is supported by both measurements and simulations of conventional and graded-channel (GC) fully depleted silicon-on-insultor (SOI) MOSFETs. The quasi-linear current-voltage characteristics of GC transistors show a decrease of the on-resistance as the length of the low doped region in the channel is increased, as well as an improvement in the third-order harmonic distortion (HD3), when compared with conventional transistors. A method for full comparison between conventional and GC SOI MOSFETs is presented, considering HD3 evolution with on-resistance tuning under low voltage of operation. Results demonstrate the significant advantages provided by the asymmetrical long channel transistors.
KW - Graded-channel MOSFET
KW - Harmonic distortion
KW - Integral function method (IFM)
KW - MOSFET-C filters
KW - Quasi-linear resistor
UR - http://www.scopus.com/inward/record.url?scp=18844377426&partnerID=8YFLogxK
U2 - 10.1109/TED.2005.846327
DO - 10.1109/TED.2005.846327
M3 - Artículo
SN - 0018-9383
VL - 52
SP - 967
EP - 972
JO - IEEE Transactions on Electron Devices
JF - IEEE Transactions on Electron Devices
IS - 5
ER -