TY - GEN
T1 - A parallel version of the Itoh-Tsujii multiplicative inversion algorithm
AU - Rodríguez-Henríquez, Francisco
AU - Morales-Luna, Guillermo
AU - Saqib, Nazar A.
AU - Cruz-Cortés, Nareli
PY - 2007
Y1 - 2007
N2 - In this contribution, we derive a novel parallel formulation of the standard Itoh-Tsujii algorithm for multiplicative inverse computation over GF(2m). When implemented in a Virtex 3200E FPGA device, our design is able to compute multiplicative inversion over GF(2193) after 20 clock cycles in about 0.94μS.
AB - In this contribution, we derive a novel parallel formulation of the standard Itoh-Tsujii algorithm for multiplicative inverse computation over GF(2m). When implemented in a Virtex 3200E FPGA device, our design is able to compute multiplicative inversion over GF(2193) after 20 clock cycles in about 0.94μS.
UR - http://www.scopus.com/inward/record.url?scp=34548073336&partnerID=8YFLogxK
U2 - 10.1007/978-3-540-71431-6_21
DO - 10.1007/978-3-540-71431-6_21
M3 - Contribución a la conferencia
AN - SCOPUS:34548073336
SN - 3540714308
SN - 9783540714309
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 226
EP - 237
BT - Reconfigurable Computing
PB - Springer Verlag
T2 - 3rd International Workshop on Applied Reconfigurable Computing, ARC 2007
Y2 - 27 March 2007 through 29 March 2007
ER -