TY - GEN
T1 - A novel hardware implementation of the compact Genetic Algorithm
AU - Moreno-Armendáriz, Marco A.
AU - Cruz-Cortés, Nareli
AU - León-Javier, Alejandro
PY - 2010
Y1 - 2010
N2 - In this paper we show a novel and efficient design of a compact Genetic Algorithm (cGA) in Hardware. This design presents the following features: modularity, concurrency, minimal resource consumption, real time execution, and high scalability properties. According to the obtained results, we show that it is viable to have this search algorithm in Hardware to be used in real time applications.
AB - In this paper we show a novel and efficient design of a compact Genetic Algorithm (cGA) in Hardware. This design presents the following features: modularity, concurrency, minimal resource consumption, real time execution, and high scalability properties. According to the obtained results, we show that it is viable to have this search algorithm in Hardware to be used in real time applications.
KW - Compact Genetic Algorithm
KW - FPGA design
UR - http://www.scopus.com/inward/record.url?scp=79951755280&partnerID=8YFLogxK
U2 - 10.1109/ReConFig.2010.54
DO - 10.1109/ReConFig.2010.54
M3 - Contribución a la conferencia
AN - SCOPUS:79951755280
SN - 9780769543147
T3 - Proceedings - 2010 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2010
SP - 156
EP - 161
BT - Proceedings - 2010 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2010
T2 - 2010 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2010
Y2 - 13 December 2010 through 15 December 2010
ER -