Implementation of tunable resistors using graded-channel SOI MOSFETs operating in cryogenic environments

M. A. Pavanello, A. Cerdeira, J. A. Martino, M. A. Alemán, D. Flandre

Research output: Contribution to conferencePaperpeer-review

Abstract

The performance evaluation of conventional and graded-channel SOI MOSFETs operating as tunable resistors is performed from room temperature down to 90 K. The on-resistance, total harmonic distortion and third order harmonic distortion have been adopted as figures of merit. It is shown that the on-resistance reduces with the temperature lowering and is smaller in any GC SOI than in conventional SOI due to the effective channel length reduction. The total harmonic distortion is weakly temperature dependent and decreases in GC transistors, due to reduction of the effective voltage amplitude that is applied on the conventionally doped part of the channel. On the other hand, the third order harmonic distortion is strongly temperature influenced, increasing 15 dB at 90 K with respect to room temperature operation. Conventional and GC SOI have similar third order harmonic distortion in all studied temperatures.

Original languageEnglish
Pages520-528
Number of pages9
StatePublished - 2005
Externally publishedYes
Event20th Symposium on Microelectronics Technology and Devices, SBMicro 2005 - Florianopolis, Brazil
Duration: 4 Sep 20057 Sep 2005

Conference

Conference20th Symposium on Microelectronics Technology and Devices, SBMicro 2005
Country/TerritoryBrazil
CityFlorianopolis
Period4/09/057/09/05

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