FPGA-based design and implementation of a phase detector to correct the I/Q imbalance

Thaimi Niubo-Aleman, José Ricardo Cardenas Valdez, José Alejandro Galaviz-Aguilar, J. Apolinar Reynoso-Hernandez, Manuel De Jesus García-Ortega, José Cruz Nuñez-Pérez

Research output: Contribution to conferencePaper

Abstract

© 2015 IEEE. This paper describes the design and implementation of a system to evaluate the I/Q modulation when phase and amplitude imperfections are added. This system allows observing the signal behavior in the presence of phase and amplitude imbalance. An approach to correct I/Q imbalances using a power detector is proposed, by means calculating peak impairments in the interest signal and phase shifting is detected. Phase shift stability is introduced for correcting (I or Q) branches respectively to guarantee amplitude and phase balancing condition in the modulator output. Experimental results are implemented employing an FPGA by using DSP-Builder to bit true VHDL hardware description of proposed model. The modulated signal with the constellation and measurements in the oscilloscope is compared.
Original languageAmerican English
DOIs
StatePublished - 29 Jan 2016
Event2015 IEEE International Autumn Meeting on Power, Electronics and Computing, ROPEC 2015 -
Duration: 29 Jan 2016 → …

Conference

Conference2015 IEEE International Autumn Meeting on Power, Electronics and Computing, ROPEC 2015
Period29/01/16 → …

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Computer hardware description languages
Amplitude modulation
Phase modulation
Phase shift
Modulators
Field programmable gate arrays (FPGA)
Detectors
Hardware
Defects

Cite this

Niubo-Aleman, T., Valdez, J. R. C., Galaviz-Aguilar, J. A., Reynoso-Hernandez, J. A., García-Ortega, M. D. J., & Nuñez-Pérez, J. C. (2016). FPGA-based design and implementation of a phase detector to correct the I/Q imbalance. Paper presented at 2015 IEEE International Autumn Meeting on Power, Electronics and Computing, ROPEC 2015, . https://doi.org/10.1109/ROPEC.2015.7395116
Niubo-Aleman, Thaimi ; Valdez, José Ricardo Cardenas ; Galaviz-Aguilar, José Alejandro ; Reynoso-Hernandez, J. Apolinar ; García-Ortega, Manuel De Jesus ; Nuñez-Pérez, José Cruz. / FPGA-based design and implementation of a phase detector to correct the I/Q imbalance. Paper presented at 2015 IEEE International Autumn Meeting on Power, Electronics and Computing, ROPEC 2015, .
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Niubo-Aleman, T, Valdez, JRC, Galaviz-Aguilar, JA, Reynoso-Hernandez, JA, García-Ortega, MDJ & Nuñez-Pérez, JC 2016, 'FPGA-based design and implementation of a phase detector to correct the I/Q imbalance', Paper presented at 2015 IEEE International Autumn Meeting on Power, Electronics and Computing, ROPEC 2015, 29/01/16. https://doi.org/10.1109/ROPEC.2015.7395116

FPGA-based design and implementation of a phase detector to correct the I/Q imbalance. / Niubo-Aleman, Thaimi; Valdez, José Ricardo Cardenas; Galaviz-Aguilar, José Alejandro; Reynoso-Hernandez, J. Apolinar; García-Ortega, Manuel De Jesus; Nuñez-Pérez, José Cruz.

2016. Paper presented at 2015 IEEE International Autumn Meeting on Power, Electronics and Computing, ROPEC 2015, .

Research output: Contribution to conferencePaper

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AU - Niubo-Aleman, Thaimi

AU - Valdez, José Ricardo Cardenas

AU - Galaviz-Aguilar, José Alejandro

AU - Reynoso-Hernandez, J. Apolinar

AU - García-Ortega, Manuel De Jesus

AU - Nuñez-Pérez, José Cruz

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AB - © 2015 IEEE. This paper describes the design and implementation of a system to evaluate the I/Q modulation when phase and amplitude imperfections are added. This system allows observing the signal behavior in the presence of phase and amplitude imbalance. An approach to correct I/Q imbalances using a power detector is proposed, by means calculating peak impairments in the interest signal and phase shifting is detected. Phase shift stability is introduced for correcting (I or Q) branches respectively to guarantee amplitude and phase balancing condition in the modulator output. Experimental results are implemented employing an FPGA by using DSP-Builder to bit true VHDL hardware description of proposed model. The modulated signal with the constellation and measurements in the oscilloscope is compared.

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Niubo-Aleman T, Valdez JRC, Galaviz-Aguilar JA, Reynoso-Hernandez JA, García-Ortega MDJ, Nuñez-Pérez JC. FPGA-based design and implementation of a phase detector to correct the I/Q imbalance. 2016. Paper presented at 2015 IEEE International Autumn Meeting on Power, Electronics and Computing, ROPEC 2015, . https://doi.org/10.1109/ROPEC.2015.7395116