TY - JOUR
T1 - Automatic On-Die Impedance Matching in Current Mode Off-Chip Signaling
AU - López-Delgadillo, Edgar
AU - Díaz-Méndez, Jose A.
AU - García-Andrade, Miguel A.
AU - Vázquez-Medina, Rubén
AU - Gurrola-Navarro, Marco A.
N1 - Publisher Copyright:
© 2014, Springer Science+Business Media New York.
PY - 2014/11
Y1 - 2014/11
N2 - A system for on-die automatic impedance matching in current mode off-chip signaling is described. In order to perform the automatic matching operation, an algorithm that integrates the sign of the impedance matching error and the sign of the coupling branch current is implemented. An advantage of the proposed system is that it works without interfering with the driver operation. The transistor level circuit implementation of the system is described and computational simulations with post layout extractions are presented. Also experimental results are shown in order to prove the performance of the system.
AB - A system for on-die automatic impedance matching in current mode off-chip signaling is described. In order to perform the automatic matching operation, an algorithm that integrates the sign of the impedance matching error and the sign of the coupling branch current is implemented. An advantage of the proposed system is that it works without interfering with the driver operation. The transistor level circuit implementation of the system is described and computational simulations with post layout extractions are presented. Also experimental results are shown in order to prove the performance of the system.
KW - Impedance matching
KW - Off-chip interconnections
KW - SS-LMS
UR - http://www.scopus.com/inward/record.url?scp=84920982739&partnerID=8YFLogxK
U2 - 10.1007/s00034-014-9821-6
DO - 10.1007/s00034-014-9821-6
M3 - Artículo
SN - 0278-081X
VL - 33
SP - 3331
EP - 3348
JO - Circuits, Systems, and Signal Processing
JF - Circuits, Systems, and Signal Processing
IS - 11
ER -