@inproceedings{a2d7651db59948ce8fc1d83361d9da4b,
title = "3-layered capacitive structure design for MEMS inertial sensing",
abstract = "In this paper a two-Terminal capacitive structure is presented in which a novel architecture with a double interleaved (interdigitated) scheme is introduced. This structure was originally conceived as a mechanism to achieve a greater capacitance between the plates (terminals) of an integrated capacitor using a relatively smaller design area in the standard 0.5μm, two polysilicon and three metal layers (2P3M) CMOS technology. This work presents the design and theoretical analysis of a three-metal interleaved structure used as a varactor tied down to the proof mass of an integrated CMOS-MEMS accelerometer where the active devices are floating-gate transistors (FGMOS) with a variable capacitive coupling coefficient. Nevertheless, the three-layered geometrical scheme may have a wide range of applications across the MEMS technology.",
keywords = "CMOS-MEMS, COMSOL, FGMOS, capacitive MEMS, capacitive sensing, floating-gate",
author = "B. Granados-Rojas and Reyes-Barranca, {M. A.} and Abarca-Jimenez, {G. S.} and Flores-Nava, {L. M.} and Moreno-Cadenas, {J. A.}",
note = "Publisher Copyright: {\textcopyright} 2016 IEEE.; 13th International Conference on Electrical Engineering, Computing Science and Automatic Control, CCE 2016 ; Conference date: 26-09-2016 Through 30-09-2016",
year = "2016",
month = nov,
day = "21",
doi = "10.1109/ICEEE.2016.7751236",
language = "Ingl{\'e}s",
series = "2016 13th International Conference on Electrical Engineering,Computing Science and Automatic Control, CCE 2016",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2016 13th International Conference on Electrical Engineering, Computing Science and Automatic Control, CCE 2016",
address = "Estados Unidos",
}